Expert in Analog IC Design, Mixed-signal IC Design, Off-shore Engineering, High-Speed Interfaces
Expert ID: 726009 Massachusetts, USA
He has worked as a consultant in intellectual property cases involving offense/defense and patent infringement and validation.
• Technology and business leader and former Associate Professor with tenure possessing balanced corporate, start-up, and academic leadership success; extensive knowledge of semiconductor manufacturing and design with emphasis on analogy/mixed-signal and RF; organizational leadership; and tangible success building and leading high-performance teams.
• Capable of shaping strategic direction of organization, nurturing strategic partnerships, and accelerating engagement of key stakeholders at all levels with government and industry.
• Able to concurrently lead, administrate, and teach, lending unique perspective based on broad career history involving extensive organizational leadership, industry-leading research, intellectual property (IP) and protections, and innovative product development.
Areas of Expertise:
• Semiconductor Technologies
• Organizational Leadership
• Program Execution to Budget and Schedule
• Technical Marketing
• Profit/loss Management
• Recruiting, Hiring, Developing and Mentoring
• U.S. Patent Law
• International Business Experience
|Year: 1986||Degree: PhD||Subject: Electrical Engineering||Institution: UC Berkeley|
|Year: 1981||Degree: MS||Subject: Electrical Engineering||Institution: UC Berkeley|
|Year: 1980||Degree: BS||Subject: Electrical Engineering||Institution: University of Michigan - Ann Arbor|
|Years: 2013 to Present||Employer: Undisclosed||Title: Director, Microelectronics Thrust – Advanced Technology Programs||Department:||Responsibilities: Establish strategic vision and practical roadmap aligned with overarching organizational goals. Jointly explore business opportunities with strategic partners, secure funding through internal and external sources, and provide high-quality, technically advanced deliverables in a timely, economical manner. Monetize IP through licensing agreements. Motivated and guided highly educated engineering staff, providing mentoring and performance reviews to elevate competency and performance.
• Developed R&D strategy in area of microelectronics including Gallium-Nitride (GaN) and Gallium-Arsenide (GaAs) semiconductor technology, heterogeneous integration, RF module and module-less assemblies, additive manufacturing for RF applications, and silicon technology.
• Secured $40M+ business with internal, government, and third-party customers.
|Years: 2009 to 2013||Employer: Raytheon Integrated Defense Systems (IDS)||Title: Sr. Department Manager – Microelectronics Engineering Technology||Department:||Responsibilities: Continuously implemented improvements across MET department accountable for developing and supporting business-critical Gallium-Nitride (GaN) and Gallium-Arsenide (GaAs) compound semiconductor processes used in the design of Monolithic Microwave Integrated Circuits (MMICs). Guided IC, MMIC, and RF module design and testing. Headed research related to RF MEMs, optical phased arrays, and advanced electronics packaging.
• Participated in recruitment, hiring, training, and assimilation of new employees into 160-member department including 30% PhDs; provided performance reviews and recommended bonuses or disciplinary actions.
• Carried P&L responsibility for $50M budget, achieving $30M from internal sources and balance from various defense agencies by winning competitive proposals.
• Enhanced organizational performance by amalgamating multiple smaller departments under one umbrella.
|Years: 2008 to Present||Employer: Undisclosed||Title: Principal||Department:||Responsibilities: Consultant in the areas of analog and mixed-signal integrated circuit design, intellectual property, business development, low-cost region outsourcing and design engineering management.|
|Years: 2004 to 2008||Employer: Teradyne||Title: Engineering Manager||Department:||Responsibilities: The position is responsible for the design and development of test and product ICs for use in future test instruments. Managed global 40+ person organization including analog/mixed-signal design, package design and signal integrity, test and characterization.|
|Years: 2003 to 2004||Employer: Maxim Semiconductor||Title: Business Manager||Department:||Responsibilities: The position is responsible for the operational amplifier and comparator product line with annual revenue of $70M. Duties included new product business plans and definitions, customer relations, and product pricing and delivery.|
|Years: 1997 to 2003||Employer: Cadence Design||Title: Engineering Group Director||Department:||Responsibilities: 2002-2003:
Responsible for overall IP product development. The IP product development organization was the industry leading supplier of networking-related IP as measured by Gartner Dataquest. Total IP revenue was in excess of $12M. IP developed in areas of PCI Express, OIF and encryption standards. The organization was run as a profit/loss center.
Total responsibility for the Cary, North Carolina Analog/Mixed-Signal Design Center. As Director built Cadence’s analog/mixed-signal integrated circuit design center in Cary, North Carolina. Center built from the ground up yielding a fully functioning organization. Center included 35 design engineers, mask designers, program management and HR. Accomplished in less than two years.
Center provided analog/mixed-signal integrated circuit design services yielding complete integrated circuits for its customers. Designs were typically built in CMOS technology down to 0.13um. Application areas included communication transceivers and smart-power applications.
An extensive international customer base was developed in support of center and other centers within the organization. Customers included 10 top 25 integrated circuit companies by revenue, three of top four programmable device companies by revenue, and top three Japanese semiconductor companies.
|Years: 1996 to 1997||Employer: Semiconductor Research Corporation||Title: Director||Department:||Responsibilities: As both the Director for Design Sciences and the Director of Factory Sciences organizations the total research budget managed exceeded $6M. Research in integrated circuit design and manufacturing were directed for SRC’s member companies. This required driving consensus decisions among representatives of the SRC member companies. Further responsibilities included technology roadmap development, investment planning, program management, customer management and Sematech Technical Advisory Board member membership.|
|Years: 1986 to 1996||Employer: North Carolina State University||Title: Associate Professor w/Tenure||Department:||Responsibilities: As a researcher and educator was internationally recognized for work in the areas of integrated circuit design, computer-aided design and computer-aided manufacturing. Over 100 papers, conference presentations, panel discussions and invited presentations. Research funding obtained from Sematech, SRC, NSF, Analog Devices, Harris and other individual company and government sources.
|Associations / Societies|
|Member IEEE, Tau Beta Pi, Eta Kappa Nu and Sigma Xi|
|Past Associate Editor IEEE Transactions on Semiconductor Manufacturing
Reviewer for several IEEE Journals and Conferences on IC design, CAD and manufacturing
|Publications and Patents Summary|
|Over 100 papers, conference presentations, panel discussions and invited presentations
3 US Patents
|Expert Witness Experience|
|Technical expert representing customers in direct technical/business intellectual property licensing meetings.|
|Training / Seminars|
|10+ years of experience in developing and delivering courses in the areas of analog and mixed-signal IC design.|
|10+ years of experience in finding and evaluating vendors in the areas of IC fabrication, intellectual property, packaging and test.|
|Knowledgable of semiconductor industry trends and their impact on the design and cost of analog/mixed-signal integrated circuits. Former participant on the International Technology Roadmap for Semiconductors.|
|Other Relevant Experience|
|Past experience in business and intellectual property valuation.|
Fields of Expertise
circuit integration, custom integrated circuit, electronic device design, electronics design engineering, integrated circuit, integrated circuit selection, integrated-circuit design, integrated-circuit manufacturing, inventions, monolithic integrated circuit design, semiconductor chip, intellectual property, patent, patent infringement, patentability evaluation, patent trolling, intellectual fraud, patent claim chart, patent claim construction brief, patent prosecution, patent specification, claim (patent), induced infringement, contributory infringement, direct infringement, defensive patenting, pn junction diode reverse breakdown voltage, semiconductor wafer inspection, electronic packaging industry, integrated-circuit reliability, electronic packaging technology, semiconductor wafer measurement, semiconductor device thermal management, semiconductor device testing, semiconductor device package modeling and simulation, semiconductor device package reliability, chip carrier, integrated-circuit package, semiconductor device package, hard semiconductor mask, device patent, rapid thermal semiconductor wafer processing, semiconductor wafer processing, semiconductor quality improvement, semiconductor integrated processing, electronic packaging, electronics, electrical device patenting, device patenting, semiconductor assembly engineering, semiconductor material processing, computer-aided integrated-circuit design, semiconductor device manufacturing, integrated-circuit design software, patent law, integrated circuit assembly, semiconductor wafer, legal patenting, semiconductor device, semiconductor mask, electronics manufacturing