Expert Details
Embedded Computing, Computer Architecture, Systems on Chip (SoC) and Low Power Electronics
ID: 730852
Texas, USA
Expert also worked for Intel, Infotronics and other divisions of Cirrus Logic where he did system design, computer hardware and extended his doctoral research of low power computer arithmetic designing digital multiplier for multiple applications. This work required extensive digital circuit simulations at the unit level and chip top level.
Expert has extensive experience in circuit design following his interest in this area from his master's degree at Stanford where his depth area was circuit design and VLSI. He created the architecture and designed a SRAM compiler for seismic applications which was implemented and used at Cirrus Logic for several generations. He also designed Read Only Memory (ROM) devices, digital multipliers and DC-DC converters for multiple applications.
In addition to his experience in full custom memory design, Expert has designed several flash (EEPROM) interfaces for smart sensors and other applications like smart meters and RFID.
Expert has dedicated most of his career to perform work in mixed-signal integrated circuits for several applications. Expert worked for many years at Cirrus Logic as an engineer and later on as a Design manager at the industrial product division. He led the architecture of smart sensors and the implementation of analog/digital for applications like weight scales, seismic applications and digital signal processors. Systems were modeled in C language and implemented in Verilog HDL. This work resulted in product lines which produced more than $100 million in revenue.
Expert served as VP engineering for RFMicron where he used his mixed signal background and his extensive experience in digital systems to define and implement the architecture for a new generation of RFID devices.
Expert has extensive experience in multiple areas of intellectual property. He is an inventor with 22 issued and 2 pending patents. As a design manager at Cirrus Logic and VP of engineering at RFMicron he supervised patent submissions and negotiated intellectual property contracts.
Expert has performed asset valuation analyzing hundreds of patents for multiple customers. He also worked in patent infringement developing claim charts, patent searchers and reverse engineering analysis.
Expert developed a smart sensor platform for Cirrus Logic. The platform was an ARM7 micro controller based integrating key peripherals: a high performance A/D converter, digital filter, embedded flash memory, RAM, ROM and several communication peripherals.
Expert has worked most of his career for mixed signal companies where engineers are responsible on both design and verification of the different IP blocks and also share the responsibility for verification at the system level. He has also worked as part of verification teams writing verification plans. During the last 5 years Expert has applied in his projects some of the latest verification trends: Common Power Format (CPF), Assertions, Random vector generation and Mixed Signal Simulation.
Expert has worked on energy efficiency evaluation from his doctoral studies and throughout his career in multiple projects. It still continues to be a main topic of interest.
Evaluated Patent Portfolio for a Fortune 500 company: performed in depth analysis of the portfolio and identified prior art patents in the context of the SDCard protocol. Developed claim charts. - 2012Asset valuation of LED lighting patents portfolio. Provided extensive analysis and recommendations of the market value of the intellectual property. - 2012Served as Subject Matter Expert for Cisco System in their lawsuit against Alcatel. Assisted lawyers in prior art research, depositions and preparation of expert witness. - 2002Consultant for Infotronics assisting them in product definition and setup of a chip design flow.
Education
| Year | Degree | Subject | Institution |
|---|---|---|---|
| Year: 1996 | Degree: PhD | Subject: Electrical Engineering | Institution: University of Texas at Austin |
| Year: 1992 | Degree: MS | Subject: Electrical Engineering | Institution: Stanford University |
| Year: 1991 | Degree: BS | Subject: Electrical Engineering | Institution: University of Puerto Rico |
Work History
| Years | Employer | Title | Department |
|---|---|---|---|
| Years: 2012 to Present | Employer: Undisclosed | Title: Founder | Department: |
Responsibilities:Technical Expert consulting for law firms and technology companies in intellectual property issues:• Performed patent portfolio analysis and claim chart development for Secure Digital Card (SD Card) standard. • Served as technical expert and completed asset valuation analysis on LED lighting patent portfolio • Data Mining of patent portfolio in the areas of: computer architecture, mobile devices, servers and cloud computing • Patent infringement analysis and claim chart development in mobile devices. |
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| Years | Employer | Title | Department |
| Years: 2009 to 2011 | Employer: RFMicron | Title: VP Engineering | Department: |
Responsibilities:Architected design flows, evaluated technology and selected the team to execute company’s vision |
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| Years | Employer | Title | Department |
| Years: 2006 to 2008 | Employer: Cirrus Logic | Title: Design Manager | Department: Industrial Product Division |
Responsibilities:Led a mixed-signal team of 12 in an 18 month project, implementing the first embedded flash memory, high performance analog ARM7 based energy measurement SoC. Taped out the chip ahead of time with first pass success:• Drove the architecture of next generation energy/power measurement System on a chip through integration of a 32-bit RISC ARM7 processor, SRAM, ROM, digital filters and a 24-bit delta sigma converter, RTC, band gap, LCD Controller and multiple peripherals. • Served as Program Manager in charge of project schedule and resource allocation of the analog, digital, verification, product and test teams. • Collaborated with marketing team to define product specification and develop roadmap. • Put in place a mixed-signal based design flow using ADMS/Modelsim. • Supervised submission of Memorandum of Inventions (MOIs) from the team, patent preparation and performed claim analysis before patent submission. • Designed flash memory interface and patented flash locking mechanism. • Responsible for IP purchase and integration: o Evaluated and licensed intellectual property • Researched and analyzed integration of Zigbee, Power Line Communications and other protocols for Smart Power Meters. • Wrote System Architecture Document, Technical Specification and led documentation of Test plans, Architecture Reviews and Design Reviews. |
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| Years | Employer | Title | Department |
| Years: 2003 to 2006 | Employer: Cirrus Logic | Title: Staff Engineer | Department: Embedded Processor Division |
Responsibilities:Key member of technical staff in the multimedia product group trusted with the design of critical blocks like video engine, DDR II interface and new micro controller based architectures for industrial applications:• Led design of a DDR memory interface and integrated this unit with multiple bank buffer video graphic engine architecture. The graphic engine was part of an ARM9 multimedia System on a Chip in 0.18um technology. o Studied and analyzed graphic engine pipeline to achieve peak performance in an ARM9 multimedia SoC. o Designed DDR memory interface and DLL in 0.18um.Modeled the system in Matlab. Implemented the DDR unit controller in Verilog. Performed circuit design of DLL in Cadence and simulated in Hspice. • Led architecture and technical specification of micro controller based project for industrial applications. Architected and designed a PWM unit for motor control. Debugged a 14-bit A/D in an ARM9 general purpose SoC in 0.18um technology. Debugged Real time clock noise issues and Pads. |
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| Years | Employer | Title | Department |
| Years: 2001 to 2003 | Employer: Independent Consultant | Title: Technical Expert | Department: |
Responsibilities:• JENKENS & GILCHRIST – Chicago, IllinoisLed patent infringement analysis of an electronic sensor system. Performed patent analysis and reverse engineering of the system. • BROBECK, PHLEGER & HARRISON – Austin, Texas Researched Software of prior art for database systems implemented in C++ and Perl. Prepared expert witnesses and assisted legal team for depositions. Developed diagrams and flow charts used in claim charts. • INFOTRONIC – Austin, Texas Reviewed and developed 0.25μm ASIC design flow for an ARM9 processor plus peripherals on a chip. Developed contracts with IC vendors and reviewed technical specifications. |
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| Years | Employer | Title | Department |
| Years: 1999 to 2001 | Employer: Cirrus Logic | Title: Design Manager | Department: Data Acquisition Division |
Responsibilities:Designed and directed mixed signal system on chip, incorporating ARM7-based processors, Flash memory, Ethernet 10/100 and A/D plus peripherals for industrial applications. Researched and recommended a smart sensor architecture integrating high performance analog, ARM7 processors and communication peripherals like CAN, SPI or Ethernet. |
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| Years | Employer | Title | Department |
| Years: 1997 to 1999 | Employer: Cirrus Logic | Title: Project Manager | Department: Data Acquisition Division |
Responsibilities:Implemented and synthesized digital filters, main controller and clock generator in Verilog and Synopsys. Conducted design reviews and supervised layout and tape-out of chips.• Established company’s dominant position in $5M to $10M annual industrial weight scale market by leading design and implementation of 24 bit A/D 130nVpp chip for high performing A/Ds. |
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| Years | Employer | Title | Department |
| Years: 1994 to 1997 | Employer: Cirrus Logic | Title: Staff Engineer | Department: Data Acquisition Division |
Responsibilities:Analyzed clock networks using Arcadia and Hspice to calculate and minimize clock skew in a 0.35μm ASIC. Performed chip top level simulations for power, timing and critical path delays using TimeMill, PowerMill and PathMill. Designed SRAMs, ROM, parallel multiplier and switching regulator for low voltage generation.• Developed centerpiece for $10M market by directing completion of ASIC for seismic applications. |
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International Experience
| Years | Country / Region | Summary |
|---|---|---|
| Years: 2000 to 2000 | Country / Region: Japan | Summary: Expert worked with the marketing visiting customers and working with the team in Japan to understand the market needs and design the next generation of smart sensor chips for the industrial market. |
| Years: 2004 to 2004 | Country / Region: China | Summary: Expert worked as part of a multi-site team. A main section of the team was in Austin, Texas but the remaining part of the team was in China. |
| Years: 2008 to 2009 | Country / Region: Serbia | Summary: Expert was the program director of a multi-site verification effort. The verification effort was performed in two phases with team 1 in Austin, TX and team 2 performing phase II in Serbia. |
Career Accomplishments
| Associations / Societies |
|---|
| IEEE Senior Member |
| Licenses / Certifications |
|---|
| P.E Licensed in Texas PMP |
| Professional Appointments |
|---|
| * Selected as Technical Committee Member for: 1997 Innovative Systems on Silicon. * Selected as Technical Committee Member for: 1998 International Conference on Computer Design |
| Publications and Patents Summary |
|---|
| He has 22 patents issued and 2 patents pending |
Additional Experience
| Expert Witness Experience |
|---|
| He has extensive experience in intellectual property in the areas of: asset valuation, patent infringement, data mining, reverse engineering and expert witness. |
| Vendor Selection |
|---|
| Owned a computer retail business for 10 years: established contract with all the dominant distributors in the industry. Put in place a e-commerce platform to market electronic products. |
| Marketing Experience |
|---|
| VP Engineering for RFMicron, a RFID company. Extensive work developing ARM based embedded systems and working with EEPROM/flash memories. Ph.D dissertation in low power design techniques for CMOS devices. |
| Other Relevant Experience |
|---|
| Develop intellectual property in the areas of: embedded computing, wireless systems, smart sensors, mobile computing, mixed signal systems, systems on chip |
Language Skills
| Language | Proficiency |
|---|---|
| Spanish |
Fields of Expertise
computer design, computer hardware, digital circuit simulation, digital logic, digital multiplier, embedded computer system, information technology, microcomputer, microprocessor, system design, VLSI design, circuit simulation, very large-scale integrated circuit simulation, read-only memory, erasable programmable read-only memory, non-volatile memory, main memory, computer memory, integrated circuit, application-specific integrated circuit, mixed-signal integrated circuit, radio frequency identification, Verilog HDL, digital circuit, expert witness, patent searching, patent claim chart, intellectual property, patent infringement, United States patent, reverse engineering, technology transfer, product invention, inventions, embedded processing, microcontroller, embedded sensor, design verification testing, energy efficiency evaluation, measurement & verification, intellectual property strategy, patent application, patent specification, patent claim construction, Controller Area Network, linear power-supply circuit, embedded software, smart card, high-frequency, microinstruction, microcode development, patentability evaluation, BIOS, analog-to-digital conversion, electric circuit, digital signal processing, computer software, analog circuit