Expert Details
Semiconductor Technology
ID: 108231
Washington, USA
During the mid-80s, Expert's group developed submicron CMOS technology as well as radiation hard SOI technology. He has an in-depth understanding of starting material qualification, gate oxides, implant dose control, multi-level metallization and inter-layer dielectrics, contamination control, and process characterization and monitoring. He has studied the profile of ultra shallow CMOS junctions using spreading resistance.
His group also made contributions in the development of SOS, SIMOX, and X-ray lithography for ULSI technology.
Expert is knowledgeable of processing, characterization, new product development and marketing of power rectifiers, thyristors, transistors, and high voltage and high power devices. He has taken laboratory research to the manufacturing floor on topics such as the control of carrier lifetime/switching properties in power devices and the application of the power Darlington transistor for electric vehicles. As an advisor to the United Nations Industrial Development Organization (UNIDO), he was able to develop power devices and the microprocessor chips necessary for the electric vehicle project in India. This required transfer of knowledge and technology between experts from the US, Europe, and India.
From the late '70s through the '80s, Expert's team at Westinghouse developed high efficiency solar cell technology using silicon dendritic web. He has examined the thermal stability of impurities in silicon solar cells and the effects of low-energy hydrogen ion implantation on dendritic web silicon cells. He implemented a systematic transfer of the solar cell technology from R & D to pilot production. His team assisted in developing a business plan for marketing the photovoltaic technology, both in the USA and abroad.
Expert has experience with the measurement of doping profiles, carrier lifetime (metallic contamination and switching speed control) oxide integrity, crystal defects, and crystal reliability. He has conducted high resolution profiling of semiconductors and non-destructive lifetime measurement by photoconductive decay. He has measured carrier diffusion effects in III-V semiconductor structures and characterized SIMOX SOI films by the point contact current voltage (PCIV) technique. Expert has also conducted characterization of direct bonded silicon wafers by the spreading resistance and point contact MOST techniques. In addition, he has done ion-channeling analysis of the crystalline quality of silicon-on-sapphire. Recently, he has focused on characterizing ultra-shallow junctions (x(j) < 500 angstroms) and has organized two international workshops on this topic.
Expert was able to successfully launch a new line of fully-automated diagnostic tools for capacitance-voltage, current-voltage, and measurements of doping profiles, this was accomplished through effective strategic planning, technical marketing, and product development plans.
Additionally, he developed a two-day seminar on semiconductor characterization, yield, and reliability, suitable for semiconductor fab engineers.
Expert has worked extensively with many silicon suppliers and device manufacturers worldwide. He is familiar with device parameter optimization, process definition, process integration, and equipment selection. His experience places him in a strong position to deal with material and device issues critical to manufacturing.
Expert has performed pioneering work in epitaxial growth of silicon and polysilicon and heteroepitaxial growth of silicon, boron, and gallium arsenide. His doctoral thesis was on doping of epitaxial silicon. He has studied gallium doped epitaxial silicon, gas phase doping of epitaxial silicon, and epitaxial growth of silicon-on-sapphire.
Education
| Year | Degree | Subject | Institution |
|---|---|---|---|
| Year: 1970 | Degree: PhD | Subject: Materials Science | Institution: University of Pittsburgh |
| Year: 1959 | Degree: MASc | Subject: Chemical Engineering | Institution: University of British Colombia, Canada |
| Year: 1956 | Degree: BSc | Subject: Chemistry | Institution: University of Gauhati, India |
Work History
| Years | Employer | Title | Department |
|---|---|---|---|
| Years: 1986 to Present | Employer: Undisclosed | Title: President | Department: |
Responsibilities:Available upon request. |
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| Years | Employer | Title | Department |
| Years: 1989 to 1993 | Employer: Undisclosed | Title: Vice President of Technology | Department: |
Responsibilities:Available upon request. |
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| Years | Employer | Title | Department |
| Years: 1967 to 1989 | Employer: Westinghouse R&D Center | Title: Manager of Device Development | Department: |
Responsibilities:Available upon request. |
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Government Experience
| Years | Agency | Role | Description |
|---|---|---|---|
| Years: to Present | Agency: | Role: | Description: Over the years he has maintained close contacts with many government agencies and industries worldwide. As an advisor to the United Nations Industrial Development Organization (UNIDO), he has made significant contributions to the semiconductor efforts in India. These close contacts allow him to stay current and on the leading edge of technology throughout the world. |
International Experience
| Years | Country / Region | Summary |
|---|---|---|
| Years: to Present | Country / Region: | Summary: Expert has travelled throughout the world, including the former Soviet Union, giving technical seminars. Over the years he has maintained close contacts with many government agencies and industries worldwide. As an advisor to the United Nations Industrial Development Organization (UNIDO), he has made significant contributions to the semiconductor efforts in India. These close contacts allow him to stay current and on the leading edge of technology throughout the world. |
Fields of Expertise
complementary metal-oxide semiconductor integrated circuit, selective epitaxy, semiconductor technology, semiconductor wafer, silicon wafer, silicon-on-sapphire material, complementary metal-oxide semiconductor device, silicon-on-insulator, ultralarge-scale integrated circuit, power semiconductor device, semiconductor device, photovoltaic cell, photovoltaics, electronics measurement, epitaxial silicon, semiconductor material characterization, semiconductor material property, semiconductor material, semiconductor device manufacturing, integrated-circuit manufacturing, semiconductor growth, epitaxy, chemical vapor deposition, defect analysis, atomic layer deposition, gate oxide, band gap, active region, semiconductor economics, gallium arsenide integrated circuit, amorphous photovoltaic cell, time-dependent dielectric breakdown, crystal reliability, silicon sensor, silicon etching, silicon processing, silicon chip, silicon chemical vapor deposition, high-purity arsenic, high-purity material, exciton, semiconductor inversion layer, bipolar integrated circuit technology, semiconductor quality improvement, semiconductor solid mechanical property, semiconductor fabrication clean-room management, power semiconductor device new product development, power bipolar transistor, silicon wafer specification, reliability, III-V semiconductor material, doping agent, electrically conductive material, semiconductor material processing, semiconductor impurity material, group VA element, electron-beam lithography, very high-speed integrated circuit, thin-film deposition, ceramic packaging process, ceramic package, silicon tetrahydride, semiconductor device analysis, X-ray lithography, metal-oxide semiconductor material, donor impurity, metal-oxide semiconductor device, semiconductor chip, semiconductor lithography, photovoltaic energy system, silicon compound, solar energy, silicon, power transistor, semiconductor passivation, metal-insulator semiconductor material, metal organic chemical vapor deposition, grain boundary, semiconductor diffusion